316 lines
16 KiB
C
316 lines
16 KiB
C
#ifndef _SFR_H
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#define _SFR_H
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#ifndef __ASSEMBLER__
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#define SFR_RO *(volatile unsigned long const *)
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#define SFR_WO *(volatile unsigned long*)
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#define SFR_RW *(volatile unsigned long*)
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#define LPSFR_RO *(volatile unsigned long const *)
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#define LPSFR_WO *(volatile unsigned long*)
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#define LPSFR_RW *(volatile unsigned long*)
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#define SWINT() asm(".long 0xb0030057")
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#define EEBREAKINT() asm(".long 0xb0040057")
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#else
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#define SFR_RO
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#define SFR_WO
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#define SFR_RW
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#define LPSFR_RO
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#define LPSFR_WO
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#define LPSFR_RW
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#define SWINT .long 0xb0030057
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#define EEBREAKINT .long 0xb0040057
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#endif
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#define SFR_BASE 0x00000100 // address 0~255 is reserved
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#define SFR0_BASE (SFR_BASE + 0x000)
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#define SFR1_BASE (SFR_BASE + 0x100)
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#define SFR2_BASE (SFR_BASE + 0x200)
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#define SFR3_BASE (SFR_BASE + 0x300)
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#define SFR4_BASE (SFR_BASE + 0x400)
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#define SFR5_BASE (SFR_BASE + 0x500)
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#define SFR6_BASE (SFR_BASE + 0x600)
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#define SFR7_BASE (SFR_BASE + 0x700)
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#define SFR8_BASE (SFR_BASE + 0x800)
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#define SFR9_BASE (SFR_BASE + 0x900)
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#define SFR10_BASE (SFR_BASE + 0xa00)
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#define SFR11_BASE (SFR_BASE + 0xb00)
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#define SFR12_BASE (SFR_BASE + 0xc00)
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#define SFR13_BASE (SFR_BASE + 0xd00)
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#define SFR14_BASE (SFR_BASE + 0xe00)
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#define SFR15_BASE (SFR_BASE + 0xf00)
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//------------------------- SFR Group0 ---------------------------------------//
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#define TICK0CON SFR_RW (SFR0_BASE + 0x01*4)
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#define TICK0CPND SFR_RW (SFR0_BASE + 0x02*4)
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#define TICK0CNT SFR_RW (SFR0_BASE + 0x03*4)
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#define TICK0PR SFR_RW (SFR0_BASE + 0x04*4)
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#define TICK1CON SFR_RW (SFR0_BASE + 0x05*4)
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#define TICK1CPND SFR_RW (SFR0_BASE + 0x06*4)
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#define TICK1CNT SFR_RW (SFR0_BASE + 0x0a*4)
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#define TICK1PR SFR_RW (SFR0_BASE + 0x0b*4)
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#define VERSIONID SFR_RW (SFR0_BASE + 0x0f*4)
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#define UART0CON SFR_RW (SFR0_BASE + 0x10*4)
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#define UART0CPND SFR_WO (SFR0_BASE + 0x11*4)
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#define UART0BAUD SFR_RW (SFR0_BASE + 0x12*4)
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#define UART0DATA SFR_RW (SFR0_BASE + 0x13*4)
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#define TMR0CON SFR_RW (SFR0_BASE + 0x14*4)
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#define TMR0CPND SFR_RW (SFR0_BASE + 0x15*4)
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#define TMR0CNT SFR_RW (SFR0_BASE + 0x16*4)
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#define TMR0PR SFR_RW (SFR0_BASE + 0x17*4)
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#define CRSTPND SFR_RW (SFR0_BASE + 0x18*4)
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#define CLKCON0 SFR_RW (SFR0_BASE + 0x19*4)
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#define WDTCON SFR_RW (SFR0_BASE + 0x1a*4)
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#define RTCCON SFR_RW (SFR0_BASE + 0x1b*4)
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#define VBRSTCON SFR_RW (SFR0_BASE + 0x1c*4)
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#define CLKCON1 SFR_RW (SFR0_BASE + 0x1d*4)
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#define RTCCPND SFR_WO (SFR0_BASE + 0x1e*4)
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#define SPI0CON SFR_RW (SFR0_BASE + 0x2a*4)
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#define SPI0BUF SFR_RW (SFR0_BASE + 0x2b*4)
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#define SPI0BAUD SFR_RW (SFR0_BASE + 0x2c*4)
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#define SPI0CPND SFR_RW (SFR0_BASE + 0x2d*4)
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#define SPI0DMACNT SFR_RW (SFR0_BASE + 0x2e*4)
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#define SPI0DMAADR SFR_RW (SFR0_BASE + 0x2f*4)
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#define UART1CON SFR_RW (SFR0_BASE + 0x30*4)
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#define UART1CPND SFR_WO (SFR0_BASE + 0x31*4)
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#define UART1BAUD SFR_RW (SFR0_BASE + 0x32*4)
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#define UART1DATA SFR_RW (SFR0_BASE + 0x33*4)
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#define TMR1CON SFR_RW (SFR0_BASE + 0x35*4)
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#define TMR1CPND SFR_RW (SFR0_BASE + 0x36*4)
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#define TMR1CNT SFR_RW (SFR0_BASE + 0x37*4)
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#define TMR1PR SFR_RW (SFR0_BASE + 0x38*4)
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#define TMR2CON SFR_RW (SFR0_BASE + 0x3a*4)
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#define TMR2CPND SFR_RW (SFR0_BASE + 0x3b*4)
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#define TMR2CNT SFR_RW (SFR0_BASE + 0x3c*4)
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#define TMR2PR SFR_RW (SFR0_BASE + 0x3d*4)
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#define CLKGAT2 SFR_RW (SFR0_BASE + 0x3e*4)
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#define DACDIGCON0 SFR_RW (SFR1_BASE + 0x0f*4)
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#define DACVOLCON SFR_RW (SFR1_BASE + 0x13*4)
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#define USBCON0 SFR_RW (SFR3_BASE + 0x00*4)
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#define USBCON1 SFR_RW (SFR3_BASE + 0x01*4)
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#define USBCON2 SFR_RW (SFR3_BASE + 0x02*4)
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#define USBCON3 SFR_RW (SFR3_BASE + 0x03*4)
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#define USBCON4 SFR_RW (SFR3_BASE + 0x04*4)
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#define PLL0CON1 SFR_RW (SFR3_BASE + 0x15*4)
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#define PWRCON0 SFR_RW (SFR3_BASE + 0x1d*4)
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#define LVDCON SFR_RW (SFR3_BASE + 0x1e*4)
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#define PWRCON1 SFR_RW (SFR3_BASE + 0x1f*4)
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#define PLL0DIV SFR_RW (SFR3_BASE + 0x23*4)
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#define PLL1DIV SFR_RW (SFR3_BASE + 0x24*4)
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#define PLL2DIV SFR_RW (SFR3_BASE + 0x25*4)
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#define PLL0CON SFR_RW (SFR3_BASE + 0x26*4)
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#define CLKDIVCON2 SFR_RW (SFR3_BASE + 0x28*4)
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#define XO26MCON SFR_RW (SFR3_BASE + 0x29*4)
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#define CLKDIVCON0 SFR_RW (SFR3_BASE + 0x2a*4)
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#define RSTCON0 SFR_RW (SFR3_BASE + 0x2b*4)
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#define CLKGAT0 SFR_RW (SFR3_BASE + 0x2c*4)
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#define LPMCON SFR_RW (SFR3_BASE + 0x2d*4)
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#define MEMCON SFR_RW (SFR3_BASE + 0x2e*4)
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#define HSUT0CON SFR_RW (SFR3_BASE + 0x30*4)
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#define HSUT0CPND SFR_RW (SFR3_BASE + 0x31*4)
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#define HSUT0BAUD SFR_RW (SFR3_BASE + 0x32*4)
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#define HSUT0DATA SFR_RW (SFR3_BASE + 0x33*4)
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#define HSUT0TXCNT SFR_RW (SFR3_BASE + 0x34*4)
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#define HSUT0TXADR SFR_RW (SFR3_BASE + 0x35*4)
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#define HSUT0RXCNT SFR_RW (SFR3_BASE + 0x36*4)
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#define HSUT0RXADR SFR_RW (SFR3_BASE + 0x37*4)
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#define HSUT0FIFOCNT SFR_RW (SFR3_BASE + 0x38*4)
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#define HSUT0FIFO SFR_RW (SFR3_BASE + 0x39*4)
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#define HSUT0FIFOADR SFR_RW (SFR3_BASE + 0x3a*4)
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#define HSUT0TMRCNT SFR_RW (SFR3_BASE + 0x3b*4)
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#define HSUT0FCCON SFR_RW (SFR3_BASE + 0x3c*4)
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#define CLKGAT1 SFR_RW (SFR3_BASE + 0x3f*4)
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#define PICCONCLR SFR_WO (SFR4_BASE + 0x0c*4)
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#define PICCONSET SFR_WO (SFR4_BASE + 0x0d*4)
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#define PICENCLR SFR_WO (SFR4_BASE + 0x0e*4)
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#define PICENSET SFR_WO (SFR4_BASE + 0x0f*4)
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#define PICCON SFR_RW (SFR4_BASE + 0x10*4)
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#define PICEN SFR_RW (SFR4_BASE + 0x11*4)
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#define PICPR SFR_RW (SFR4_BASE + 0x12*4)
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#define PICADR SFR_RW (SFR4_BASE + 0x13*4)
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#define PICPND SFR_RW (SFR4_BASE + 0x14*4)
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#define FUNCMCON0 SFR_RW (SFR5_BASE + 0x0a*4)
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#define FUNCMCON1 SFR_RW (SFR5_BASE + 0x0b*4)
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#define FUNCMCON2 SFR_RW (SFR5_BASE + 0x0c*4)
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#define SADCDAT0 SFR_RO (SFR5_BASE + 0x20*4)
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#define SADCDAT1 SFR_RO (SFR5_BASE + 0x21*4)
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#define SADCDAT2 SFR_RO (SFR5_BASE + 0x22*4)
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#define SADCDAT3 SFR_RO (SFR5_BASE + 0x23*4)
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#define SADCDAT4 SFR_RO (SFR5_BASE + 0x24*4)
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#define SADCDAT5 SFR_RO (SFR5_BASE + 0x25*4)
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#define SADCDAT6 SFR_RO (SFR5_BASE + 0x26*4)
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#define SADCDAT7 SFR_RO (SFR5_BASE + 0x27*4)
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#define SADCDAT8 SFR_RO (SFR5_BASE + 0x28*4)
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#define SADCDAT9 SFR_RO (SFR5_BASE + 0x29*4)
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#define SADCDAT10 SFR_RO (SFR5_BASE + 0x2a*4)
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#define SADCDAT11 SFR_RO (SFR5_BASE + 0x2b*4)
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#define SADCDAT12 SFR_RO (SFR5_BASE + 0x2c*4)
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#define SADCDAT13 SFR_RO (SFR5_BASE + 0x2d*4)
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#define SADCDAT14 SFR_RO (SFR5_BASE + 0x2e*4)
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#define SADCDAT15 SFR_RO (SFR5_BASE + 0x2f*4)
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#define SADCCON SFR_RW (SFR5_BASE + 0x30*4)
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#define SADCCH SFR_RW (SFR5_BASE + 0x31*4)
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#define SADCST SFR_WO (SFR5_BASE + 0x32*4)
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#define SADCBAUD SFR_WO (SFR5_BASE + 0x33*4)
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//------------------------- SFR Group6 ---------------------------------------//
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#define GPIOASET LPSFR_WO (SFR6_BASE + 0x00*4)
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#define GPIOACLR LPSFR_WO (SFR6_BASE + 0x01*4)
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#define GPIOA LPSFR_RW (SFR6_BASE + 0x02*4)
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#define GPIOADIR LPSFR_RW (SFR6_BASE + 0x03*4)
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#define GPIOADE LPSFR_RW (SFR6_BASE + 0x04*4)
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#define GPIOAFEN LPSFR_RW (SFR6_BASE + 0x05*4)
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#define GPIOADRV LPSFR_RW (SFR6_BASE + 0x06*4)
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#define GPIOAPU LPSFR_RW (SFR6_BASE + 0x07*4)
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#define GPIOAPD LPSFR_RW (SFR6_BASE + 0x08*4)
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#define GPIOAPU200K LPSFR_RW (SFR6_BASE + 0x09*4)
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#define GPIOAPD200K LPSFR_RW (SFR6_BASE + 0x0a*4)
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#define GPIOAPU300 LPSFR_RW (SFR6_BASE + 0x0b*4)
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#define GPIOAPD300 LPSFR_RW (SFR6_BASE + 0x0c*4)
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#define GPIOBSET LPSFR_WO (SFR6_BASE + 0x10*4)
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#define GPIOBCLR LPSFR_WO (SFR6_BASE + 0x11*4)
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#define GPIOB LPSFR_RW (SFR6_BASE + 0x12*4)
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#define GPIOBDIR LPSFR_RW (SFR6_BASE + 0x13*4)
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#define GPIOBDE LPSFR_RW (SFR6_BASE + 0x14*4)
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#define GPIOBFEN LPSFR_RW (SFR6_BASE + 0x15*4)
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#define GPIOBDRV LPSFR_RW (SFR6_BASE + 0x16*4)
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#define GPIOBPU LPSFR_RW (SFR6_BASE + 0x17*4)
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#define GPIOBPD LPSFR_RW (SFR6_BASE + 0x18*4)
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#define GPIOBPU200K LPSFR_RW (SFR6_BASE + 0x19*4)
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#define GPIOBPD200K LPSFR_RW (SFR6_BASE + 0x1a*4)
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#define GPIOBPU300 LPSFR_RW (SFR6_BASE + 0x1b*4)
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#define GPIOBPD300 LPSFR_RW (SFR6_BASE + 0x1c*4)
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#define GPIOESET LPSFR_WO (SFR6_BASE + 0x20*4)
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#define GPIOECLR LPSFR_WO (SFR6_BASE + 0x21*4)
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#define GPIOE LPSFR_RW (SFR6_BASE + 0x22*4)
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#define GPIOEDIR LPSFR_RW (SFR6_BASE + 0x23*4)
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#define GPIOEDE LPSFR_RW (SFR6_BASE + 0x24*4)
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#define GPIOEFEN LPSFR_RW (SFR6_BASE + 0x25*4)
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#define GPIOEDRV LPSFR_RW (SFR6_BASE + 0x26*4)
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#define GPIOEPU LPSFR_RW (SFR6_BASE + 0x27*4)
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#define GPIOEPD LPSFR_RW (SFR6_BASE + 0x28*4)
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#define GPIOEPU200K LPSFR_RW (SFR6_BASE + 0x29*4)
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#define GPIOEPD200K LPSFR_RW (SFR6_BASE + 0x2a*4)
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#define GPIOEPU300 LPSFR_RW (SFR6_BASE + 0x2b*4)
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#define GPIOEPD300 LPSFR_RW (SFR6_BASE + 0x2c*4)
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#define GPIOFSET LPSFR_WO (SFR6_BASE + 0x30*4)
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#define GPIOFCLR LPSFR_WO (SFR6_BASE + 0x31*4)
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#define GPIOF LPSFR_RW (SFR6_BASE + 0x32*4)
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#define GPIOFDIR LPSFR_RW (SFR6_BASE + 0x33*4)
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#define GPIOFDE LPSFR_RW (SFR6_BASE + 0x34*4)
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#define GPIOFFEN LPSFR_RW (SFR6_BASE + 0x35*4)
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#define GPIOFDRV LPSFR_RW (SFR6_BASE + 0x36*4)
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#define GPIOFPU LPSFR_RW (SFR6_BASE + 0x37*4)
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#define GPIOFPD LPSFR_RW (SFR6_BASE + 0x38*4)
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#define GPIOFPU200K LPSFR_RW (SFR6_BASE + 0x39*4)
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#define GPIOFPD200K LPSFR_RW (SFR6_BASE + 0x3a*4)
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#define GPIOFPU300 LPSFR_RW (SFR6_BASE + 0x3b*4)
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#define GPIOFPD300 LPSFR_RW (SFR6_BASE + 0x3c*4)
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//------------------------- SFR Group7 ---------------------------------------//
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#define GPIOGSET LPSFR_WO (SFR7_BASE + 0x00*4)
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#define GPIOGCLR LPSFR_WO (SFR7_BASE + 0x01*4)
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#define GPIOG LPSFR_RW (SFR7_BASE + 0x02*4)
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#define GPIOGDIR LPSFR_RW (SFR7_BASE + 0x03*4)
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#define GPIOGDE LPSFR_RW (SFR7_BASE + 0x04*4)
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#define GPIOGFEN LPSFR_RW (SFR7_BASE + 0x05*4)
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#define GPIOGDRV LPSFR_RW (SFR7_BASE + 0x06*4)
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#define GPIOGPU LPSFR_RW (SFR7_BASE + 0x07*4)
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#define GPIOGPD LPSFR_RW (SFR7_BASE + 0x08*4)
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#define GPIOGPU200K LPSFR_RW (SFR7_BASE + 0x09*4)
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#define GPIOGPD200K LPSFR_RW (SFR7_BASE + 0x0a*4)
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#define GPIOGPU300 LPSFR_RW (SFR7_BASE + 0x0b*4)
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#define GPIOGPD300 LPSFR_RW (SFR7_BASE + 0x0c*4)
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#define WKUPCON LPSFR_RW (SFR7_BASE + 0x10*4)
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#define WKUPEDG LPSFR_RW (SFR7_BASE + 0x11*4)
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#define WKUPCPND LPSFR_WO (SFR7_BASE + 0x12*4)
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#define PORTINTEDG LPSFR_RW (SFR7_BASE + 0x13*4)
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#define PORTINTEN LPSFR_RW (SFR7_BASE + 0x14*4)
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#define WKPINMAP LPSFR_RW (SFR7_BASE + 0x15*4)
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#define SENSCON LPSFR_RW (SFR7_BASE + 0x16*4)
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#define SENSCPND LPSFR_WO (SFR7_BASE + 0x17*4)
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#define SENSCNT LPSFR_RW (SFR7_BASE + 0x18*4)
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#define SENSCON1 LPSFR_RW (SFR7_BASE + 0x19*4)
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//------------------------- SFR Group8 ---------------------------------------//
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#define IIC0CON0 SFR_RW (SFR8_BASE + 0x00*4)
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#define IIC0CON1 SFR_RW (SFR8_BASE + 0x01*4)
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#define IIC0CMDA SFR_RW (SFR8_BASE + 0x02*4)
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#define IIC0DATA SFR_RW (SFR8_BASE + 0x03*4)
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#define IIC0DMAADR SFR_RW (SFR8_BASE + 0x04*4)
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#define IIC0DMACNT SFR_RW (SFR8_BASE + 0x05*4)
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#define IIC0SSTS SFR_RW (SFR8_BASE + 0x06*4)
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#define IIC1CON0 SFR_RW (SFR8_BASE + 0x07*4)
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#define IIC1CON1 SFR_RW (SFR8_BASE + 0x08*4)
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#define IIC1CMDA SFR_RW (SFR8_BASE + 0x09*4)
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#define IIC1DATA SFR_RW (SFR8_BASE + 0x0a*4)
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#define IIC1DMAADR SFR_RW (SFR8_BASE + 0x0b*4)
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#define IIC1DMACNT SFR_RW (SFR8_BASE + 0x0c*4)
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#define IIC1SSTS SFR_RW (SFR8_BASE + 0x0d*4)
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#define IRRXCON SFR_RW (SFR8_BASE + 0x1b*4)
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#define IRRXDAT SFR_RW (SFR8_BASE + 0x1c*4)
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#define IRRXCPND SFR_WO (SFR8_BASE + 0x1d*4)
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#define IRRXERR0 SFR_WO (SFR8_BASE + 0x1e*4)
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#define IRRXERR1 SFR_WO (SFR8_BASE + 0x1f*4)
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#define PROTCON1 SFR_RW (SFR8_BASE + 0x23*4)
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#define QDECCON SFR_RW (SFR8_BASE + 0x31*4)
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#define QDECCPND SFR_RW (SFR8_BASE + 0x32*4)
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//------------------------- SFR Group9 ---------------------------------------//
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#define TMR3CON SFR_RW (SFR9_BASE + 0x00*4)
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#define TMR3CPND SFR_WO (SFR9_BASE + 0x01*4)
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#define TMR3CNT SFR_RW (SFR9_BASE + 0x02*4)
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#define TMR3PR SFR_RW (SFR9_BASE + 0x03*4)
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#define TMR3CPT SFR_RO (SFR9_BASE + 0x04*4)
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//#define TMR3DUTY0 SFR_WO (SFR9_BASE + 0x05*4)
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//#define TMR3DUTY1 SFR_WO (SFR9_BASE + 0x06*4)
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//#define TMR3DUTY2 SFR_WO (SFR9_BASE + 0x07*4)
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#define TMR4CON SFR_RW (SFR9_BASE + 0x08*4)
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#define TMR4CPND SFR_WO (SFR9_BASE + 0x09*4)
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#define TMR4CNT SFR_RW (SFR9_BASE + 0x0a*4)
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#define TMR4PR SFR_RW (SFR9_BASE + 0x0b*4)
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#define TMR4CPT SFR_RO (SFR9_BASE + 0x0c*4)
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//#define TMR4DUTY0 SFR_WO (SFR9_BASE + 0x0d*4)
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//#define TMR4DUTY1 SFR_WO (SFR9_BASE + 0x0e*4)
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//#define TMR4DUTY2 SFR_WO (SFR9_BASE + 0x0f*4)
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#define TMR5CON SFR_RW (SFR9_BASE + 0x10*4)
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#define TMR5CPND SFR_WO (SFR9_BASE + 0x11*4)
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#define TMR5CNT SFR_RW (SFR9_BASE + 0x12*4)
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#define TMR5PR SFR_RW (SFR9_BASE + 0x13*4)
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#define TMR5CPT SFR_RO (SFR9_BASE + 0x14*4)
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#define TMR5DUTY0 SFR_RW (SFR9_BASE + 0x15*4)
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#define TMR5DUTY1 SFR_RW (SFR9_BASE + 0x16*4)
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#define TMR5DUTY2 SFR_RW (SFR9_BASE + 0x17*4)
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#define TMR5DUTY3 SFR_RW (SFR9_BASE + 0x18*4)
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#define TMR5DUTY4 SFR_RW (SFR9_BASE + 0x19*4)
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#define TMR5DUTY5 SFR_RW (SFR9_BASE + 0x1a*4)
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#define SPI1CON SFR_RW (SFR9_BASE + 0x20*4)
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#define SPI1BUF SFR_RW (SFR9_BASE + 0x21*4)
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#define SPI1BAUD SFR_RW (SFR9_BASE + 0x22*4)
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#define SPI1CPND SFR_RW (SFR9_BASE + 0x23*4)
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#define SPI1DMACNT SFR_RW (SFR9_BASE + 0x24*4)
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#define SPI1DMAADR SFR_RW (SFR9_BASE + 0x25*4)
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#define FREQDETCON SFR_RW (SFR9_BASE + 0x28*4)
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#define RTCALM SFR_RW (SFR9_BASE + 0x2e*4)
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#define RTCCNT SFR_RW (SFR9_BASE + 0x2f*4)
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#define RTCCON0 SFR_RW (SFR9_BASE + 0x30*4)
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#define RTCCON1 SFR_RW (SFR9_BASE + 0x31*4)
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#define RTCCON2 SFR_RW (SFR9_BASE + 0x32*4)
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#define RTCCON3 SFR_RW (SFR9_BASE + 0x33*4)
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#define RTCCON4 SFR_RW (SFR9_BASE + 0x34*4)
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#define RTCCON5 SFR_RW (SFR9_BASE + 0x35*4)
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#define RTCCON6 SFR_RW (SFR9_BASE + 0x36*4)
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#define RTCCON7 SFR_RW (SFR9_BASE + 0x37*4)
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#define RTCCON8 SFR_RW (SFR9_BASE + 0x38*4)
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#define RTCCON9 SFR_RW (SFR9_BASE + 0x39*4)
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#define RTCCON10 SFR_RW (SFR9_BASE + 0x3a*4)
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#define RTCCON11 SFR_RW (SFR9_BASE + 0x3b*4)
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#define RTCCON12 SFR_RW (SFR9_BASE + 0x3c*4)
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#define RTCCON13 SFR_RW (SFR9_BASE + 0x3d*4)
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#define RTCCON14 SFR_RW (SFR9_BASE + 0x3e*4)
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#define RTCCON15 SFR_RW (SFR9_BASE + 0x3f*4)
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#define DESPICON SFR_RW (SFR10_BASE + 0x1e*4)
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#define DESPIBUF SFR_RW (SFR10_BASE + 0x1f*4)
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#define DESPIBAUD SFR_RW (SFR10_BASE + 0x20*4)
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#endif
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