/*----------------------------------------------------------------------------
 * Copyright (c) Fenda Technologies Co., Ltd. 2020. All rights reserved.
 *
 * Description: drv_mx25u51245g.h 
 *
 * Author: saimen
 *
 * Create: 2021-04-27
 *--------------------------------------------------------------------------*/

#ifndef _DRV_MX25U51245G_H
#define _DRV_MX25U51245G_H

#include <stdint.h>


/* Write Operations */
#define WRITE_ENABLE_CMD                     0x06
#define WRITE_DISABLE_CMD                    0x04

/* qspi mode */
#define ENTER_QPI_MODE_CMD                   0x35
#define EXIT_QPI_MODE_CMD                    0xf5

/* qspi reset */
#define ENABLE_RESET                         0x66
#define RESET_DEV                            0x99

/* Register Operations */
#define READ_STATUS_REG_CMD                  0x05
#define READ_CONF_REG_CMD                    0x15
#define READ_EXTEND_ADDR_REG_CMD             0xC8
#define WRITE_STATUS_CONF_REG_CMD            0x01
#define WRITE_EXTEND_ADDR_REG_CMD            0xC5
#define WRITE_STATUS_REG_3_CMD               0x11

/* Addr Operations */
#define ENTER_4_BYTES_CMD                    0xB7
#define EXIT_4_BYTES_CMD                     0xE9

/* Read Operations */
#define READ_CMD                             0x13
#define FAST_READ_CMD                        0x0C
#define QUAD_OUT_READ_CMD                    0x6C
#define QUAD_INOUT_READ_CMD                  0xEE

/* Program Operations */
#define PAGE_PROG_CMD                        0x12
#define QPAGE_PROG_CMD                       0x3E
     
/* Erase Operations */
#define SECTOR_ERASE_CMD                     0x21           //4K
#define SUBBLOCK_ERASE_CMD                   0x5C           //32K
#define BLOCK_ERASE_CMD                      0xDC           //64K
#define CHIP_ERASE_CMD                       0x60
#define CHIP_ERASE_CMD_2                     0xC7
#define PROG_ERASE_RESUME_CMD                0x7A
#define PROG_ERASE_SUSPEND_CMD               0x75

/* Identification Operations */
#define READ_ID_CMD                          0x9F
#define QREAD_ID_CMD                         0xAF

/* Power Down Operations */
#define ENTER_DEEP_POWER_DOWN_CMD            0xB9
#define RELEASE_DEEP_POWER_DOWN_CMD          0xAB

/* manufacturer ID of 1-byte and  Device ID of 2-byte */
#define FLASH_JEDEC_ID                       0xC2253A

/********************************************************/

/// MX25U51245G页大小, 最小读写单元
#define MX25U51245G_PAGE_SIZE                       256
/// MX25U51245G扇区大小, 最小擦除单元
#define MX25U51245G_SECTOR_SIZE                     4096
/// MX25U51245G最小擦除单元大小
#define MX25U51245G_ERASE_UNIT_SIZE                 4096
/// MX25U51245G块大小
#define MX25U51245G_BLOCK_SIZE                      65536
/// MX25U51245G总大小
#define MX25U51245G_TOTAL_SIZE                      (64*1024*1024)

//FS ADD START
/** MX25U51245G NOR FLASH 文件系统宏定义 ------------------------------------- */
/// MX25U51245G扇区FS使用首扇区,起始编号, FLASH器件后40M为文件系统
#define MX25U51245G_FS_BASE_SECTOR                  6144
/// MX25U51245G扇区FS使用扇区个数, 扇区编号: 6144 ~ 16383
#define MX25U51245G_FS_SECTORS                      10240
//FS ADD END

#define MX25U51245G_MSPI_TIMEOUT                    2000000 //us
#define MX25U51245G_MSPI_CHIP_ERASE_TIMEOUT         300000000 //us


typedef struct
{
    uint32_t status;
    void(*transfer_cb)(void *pcFmt, ...);
    void(*lock)(void);
    void(*unlock)(void);
    void(*delay_ms)(uint32_t ms);
//    uint32_t DMABuffer[MX25U51245G_PAGE_SIZE];
}mx25u512_info_t;


//read write config
extern void drv_mx25u512_open(void);
extern void drv_mx25u512_close(void);
extern void drv_mx25u512_info_init(void* delay_ms,void* lock,void* unlock,void* transfer_cb);
extern void drv_mx25u512_enter_power_down(void);
extern void drv_mx25u512_release_power_down(void);
extern uint32_t drv_mx25u512_read_id(void);
extern uint32_t drv_mx25u512_read_status(void);
extern void mx25u512_wait_ready(uint32_t delay_cs,uint32_t time_out);
//read,write,erase flash
extern uint32_t drv_mx25u512_chip_erase(void);
extern uint32_t drv_mx25u512_smart_erase(uint32_t begin_addr,uint32_t end_addr);
extern uint32_t drv_mx25u512_read_nonblocking(uint8_t *pdata,uint32_t addr,uint32_t readlen);
//与drv_mx25u512_read_nonblocking相比，不带延迟等待
extern uint32_t drv_mx25u512_read_nonblocking_ex(uint8_t *pdata,uint32_t addr,uint32_t readlen);
extern uint32_t drv_mx25u512_write_nonblocking(uint8_t *pdata,uint32_t addr,uint32_t writelen);
extern uint32_t drv_mx25u512_sector_erase(uint32_t addr);


#endif