/*----------------------------------------------------------------------------
 * Copyright (c) Fenda Technologies Co., Ltd. 2021. All rights reserved.
 *
 * Description: ppg_port.c
 *
 * Author: shey.tanxiaoyu
 *
 * Create: 2022-04-20
 *--------------------------------------------------------------------------*/

#include "ppg_port.h"
#include "FreeRTOS.h"
#include "semphr.h"
#include "am_mcu_apollo.h"
#include "am_util_delay.h"
#include <string.h>

#define ENABLE_STATIC_PRINT 1
extern uint32_t am_util_stdio_printf(const char *pcFmt, ...);
#define static_print_error(...)    am_util_stdio_printf(__VA_ARGS__)//错误打印一般常开
#if ENABLE_STATIC_PRINT
#define static_print_info(...)    am_util_stdio_printf(__VA_ARGS__)//一般信息打印宏控制
#else
#define static_print_info(...)
#endif

#define GH3011_SPI_MODULE_NUM                   2
#define GH3011_SPI_CLOCK_FREQ                   AM_HAL_IOM_4MHZ
#define GH3011_SPI_MODE                         AM_HAL_IOM_SPI_MODE_0

#define GH3011_SPI_CS                           2
#define GH3011_SPI_SCK                          25
#define GH3011_SPI_MOSI                         26
#define GH3011_SPI_MISO                         27

#define GH3011_POWER_GPIO_NUM                   1
#define GH3011_RESET_GPIO_NUM                   3
#define GH3011_INT_GPIO_NUM                     4

static void *g_spi_handle = NULL;

void ppg_port_delay_us(uint16_t us)
{
    am_util_delay_us(us);
}

void ppg_port_delay_ms(uint32_t ms)
{
    if (xTaskGetSchedulerState() != taskSCHEDULER_RUNNING) {
        am_util_delay_ms(ms);
    } else {
        vTaskDelay(pdMS_TO_TICKS(ms));
    }
}

void ppg_port_bus_open(void)
{
    int8_t ret;

    am_hal_iom_config_t iom_cfg = {
        .eInterfaceMode                 = AM_HAL_IOM_SPI_MODE,
        .ui32ClockFreq                  = GH3011_SPI_CLOCK_FREQ,
        .eSpiMode                       = GH3011_SPI_MODE,
    };

    am_hal_gpio_pincfg_t sck_pincfg = {
        .GP.cfg_b.uFuncSel              = AM_HAL_PIN_25_M2SCK,
    };

    am_hal_gpio_pincfg_t mosi_pincfg = {
        .GP.cfg_b.uFuncSel              = AM_HAL_PIN_26_M2MOSI,
    };

    am_hal_gpio_pincfg_t miso_pincfg = {
        .GP.cfg_b.uFuncSel              = AM_HAL_PIN_27_M2MISO,
    };

    am_hal_gpio_pinconfig(GH3011_SPI_CS, am_hal_gpio_pincfg_output);
    am_hal_gpio_pinconfig(GH3011_SPI_SCK, sck_pincfg);
    am_hal_gpio_pinconfig(GH3011_SPI_MOSI, mosi_pincfg);
    am_hal_gpio_pinconfig(GH3011_SPI_MISO, miso_pincfg);

    ret = am_hal_iom_initialize(GH3011_SPI_MODULE_NUM, &g_spi_handle);
    if (AM_HAL_STATUS_SUCCESS != ret) {
        static_print_info("ppg_port_bus_open failed!!! SPI%d, err_num = %d\n", GH3011_SPI_MODULE_NUM, ret);
        return;
    }

    am_hal_iom_power_ctrl(g_spi_handle, AM_HAL_SYSCTRL_WAKE, false);
    am_hal_iom_configure(g_spi_handle, &iom_cfg);
    am_hal_iom_enable(g_spi_handle);
}

void ppg_port_bus_close(void)
{
    int8_t ret;

    am_hal_iom_disable(g_spi_handle);
    am_hal_iom_power_ctrl(g_spi_handle, AM_HAL_SYSCTRL_DEEPSLEEP, false);
    ret = am_hal_iom_uninitialize(g_spi_handle);
    if (AM_HAL_STATUS_SUCCESS != ret) {
        static_print_info("ppg_port_bus_close failed!!! SPI%d, err_num = %d\n", GH3011_SPI_MODULE_NUM, ret);
    }

    am_hal_gpio_pinconfig(GH3011_SPI_CS,   am_hal_gpio_pincfg_disabled);
    am_hal_gpio_pinconfig(GH3011_SPI_SCK,  am_hal_gpio_pincfg_disabled);
    am_hal_gpio_pinconfig(GH3011_SPI_MOSI, am_hal_gpio_pincfg_disabled);
    am_hal_gpio_pinconfig(GH3011_SPI_MISO, am_hal_gpio_pincfg_disabled);
}

void ppg_port_bus_cs_low(void)
{
    am_hal_gpio_output_clear(GH3011_SPI_CS);
}

void ppg_port_bus_cs_high(void)
{
    am_hal_gpio_output_set(GH3011_SPI_CS);
}

int32_t ppg_port_bus_write(uint8_t *write_buf, uint16_t write_len)
{
    int8_t ret;

    am_hal_iom_transfer_t transfer_cfg;

    transfer_cfg.uPeerInfo.ui32SpiChipSelect = 0;
    transfer_cfg.ui32InstrLen = 0;
    transfer_cfg.ui64Instr = 0;
    transfer_cfg.ui32NumBytes = write_len;
    transfer_cfg.eDirection = AM_HAL_IOM_TX;
    transfer_cfg.pui32TxBuffer = (uint32_t *)write_buf;
    transfer_cfg.pui32RxBuffer = NULL;
    transfer_cfg.bContinue = 0;
    transfer_cfg.ui8RepeatCount = 0;
    transfer_cfg.ui8Priority = 0;
    transfer_cfg.ui32PauseCondition = 0;
    transfer_cfg.ui32StatusSetClr = 0;

    ret = am_hal_iom_blocking_transfer(g_spi_handle, &transfer_cfg);
    if (AM_HAL_STATUS_SUCCESS != ret) {
        static_print_info("ppg_port_bus_write failed!!! SPI%d, err_num = %d\n", GH3011_SPI_MODULE_NUM, ret);
    }

    return 0;
}

int32_t ppg_port_bus_read(uint8_t *read_buf, uint16_t read_len)
{
    int8_t ret;

    am_hal_iom_transfer_t transfer_cfg;

    transfer_cfg.uPeerInfo.ui32SpiChipSelect = 0;
    transfer_cfg.ui32InstrLen = 0;
    transfer_cfg.ui64Instr = 0;
    transfer_cfg.ui32NumBytes = read_len;
    transfer_cfg.eDirection = AM_HAL_IOM_RX;
    transfer_cfg.pui32TxBuffer = NULL;
    transfer_cfg.pui32RxBuffer = (uint32_t *)read_buf;
    transfer_cfg.bContinue = 0;
    transfer_cfg.ui8RepeatCount = 0;
    transfer_cfg.ui8Priority = 0;
    transfer_cfg.ui32PauseCondition = 0;
    transfer_cfg.ui32StatusSetClr = 0;

    ret = am_hal_iom_blocking_transfer(g_spi_handle, &transfer_cfg);
    if (AM_HAL_STATUS_SUCCESS != ret) {
        static_print_info("ppg_port_bus_read failed!!! SPI%d, err_num = %d\n", GH3011_SPI_MODULE_NUM, ret);
    }

    return 0;
}

void ppg_port_exti_enable(void *p_callback)
{
    if (p_callback == NULL) {
        return;
    }

    uint32_t gpio_num = GH3011_INT_GPIO_NUM;
    am_hal_gpio_pincfg_t gpio_cfg = {0};
    uint32_t irq_type = GPIO_NUM2IDX(gpio_num) + 56;
    uint32_t int_mask = GPIO_NUM2MSK(gpio_num);

    memset(&gpio_cfg, 0, sizeof(am_hal_gpio_pincfg_t));

    gpio_cfg.GP.cfg_b.uFuncSel  = 3;
    gpio_cfg.GP.cfg_b.eGPInput  = AM_HAL_GPIO_PIN_INPUT_ENABLE;
    gpio_cfg.GP.cfg_b.ePullup   = AM_HAL_GPIO_PIN_PULLUP_NONE;
    gpio_cfg.GP.cfg_b.eIntDir   = AM_HAL_GPIO_PIN_INTDIR_LO2HI;

    am_hal_gpio_pinconfig(gpio_num, gpio_cfg);
    am_hal_gpio_interrupt_register(AM_HAL_GPIO_INT_CHANNEL_0, gpio_num, (am_hal_gpio_handler_t)p_callback, NULL);
    am_hal_gpio_interrupt_irq_clear(irq_type, int_mask);
    am_hal_gpio_interrupt_control(AM_HAL_GPIO_INT_CHANNEL_0, AM_HAL_GPIO_INT_CTRL_INDV_ENABLE, &gpio_num);

    NVIC_SetPriority((IRQn_Type)irq_type, AM_IRQ_PRIORITY_DEFAULT);
    NVIC_EnableIRQ((IRQn_Type)irq_type);
}

void ppg_port_exti_disable(void)
{
    uint32_t gpio_num = GH3011_INT_GPIO_NUM;
    am_hal_gpio_pincfg_t gpio_cfg = {0};
    uint32_t irq_type = GPIO_NUM2IDX(gpio_num) + 56;
    uint32_t int_mask = GPIO_NUM2MSK(gpio_num);

    memset(&gpio_cfg, 0, sizeof(am_hal_gpio_pincfg_t));

    gpio_cfg.GP.cfg_b.uFuncSel  = 3;
    gpio_cfg.GP.cfg_b.eGPInput  = AM_HAL_GPIO_PIN_INPUT_NONE;
    gpio_cfg.GP.cfg_b.ePullup   = AM_HAL_GPIO_PIN_PULLUP_NONE;
    gpio_cfg.GP.cfg_b.eIntDir   = AM_HAL_GPIO_PIN_INTDIR_NONE;

    am_hal_gpio_interrupt_irq_clear(irq_type, int_mask);
    am_hal_gpio_pinconfig(gpio_num, gpio_cfg);
    am_hal_gpio_interrupt_control(AM_HAL_GPIO_INT_CHANNEL_0, AM_HAL_GPIO_INT_CTRL_INDV_DISABLE, &gpio_num);
}

void ppg_port_reset_pin_init(void)
{
    am_hal_gpio_pinconfig(GH3011_RESET_GPIO_NUM, am_hal_gpio_pincfg_output);
}

void ppg_port_reset_pin_deinit(void)
{
    am_hal_gpio_pinconfig(GH3011_RESET_GPIO_NUM, am_hal_gpio_pincfg_disabled);
}

void ppg_port_reset_pin_set(uint8_t val)
{
    if (val) {
        am_hal_gpio_output_set(GH3011_RESET_GPIO_NUM);
    } else {
        am_hal_gpio_output_clear(GH3011_RESET_GPIO_NUM);
    }
}

void ppg_port_power_pin_init(void)
{
    am_hal_gpio_pinconfig(GH3011_POWER_GPIO_NUM, am_hal_gpio_pincfg_output);
}

void ppg_port_power_pin_deinit(void)
{
    am_hal_gpio_pinconfig(GH3011_POWER_GPIO_NUM, am_hal_gpio_pincfg_disabled);
}

void ppg_port_power_pin_set(uint8_t val)
{
    if (val) {
        am_hal_gpio_output_set(GH3011_POWER_GPIO_NUM);
    } else {
        am_hal_gpio_output_clear(GH3011_POWER_GPIO_NUM);
    }
}

uint8_t ppg_port_power_pin_get(void)
{
    return am_hal_gpio_output_read(GH3011_POWER_GPIO_NUM);
}