264 lines
8.2 KiB
C
264 lines
8.2 KiB
C
/*----------------------------------------------------------------------------
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* Copyright (c) Fenda Technologies Co., Ltd. 2021. All rights reserved.
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*
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* Description: ppg_port.c
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*
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* Author: shey.tanxiaoyu
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*
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* Create: 2022-04-20
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*--------------------------------------------------------------------------*/
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#include "ppg_port.h"
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#include "FreeRTOS.h"
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#include "semphr.h"
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#include "am_mcu_apollo.h"
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#include "am_util_delay.h"
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#include <string.h>
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#define ENABLE_STATIC_PRINT 1
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extern uint32_t am_util_stdio_printf(const char *pcFmt, ...);
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#define static_print_error(...) am_util_stdio_printf(__VA_ARGS__)//错误打印一般常开
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#if ENABLE_STATIC_PRINT
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#define static_print_info(...) am_util_stdio_printf(__VA_ARGS__)//一般信息打印宏控制
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#else
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#define static_print_info(...)
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#endif
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#define GH3011_SPI_MODULE_NUM 2
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#define GH3011_SPI_CLOCK_FREQ AM_HAL_IOM_4MHZ
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#define GH3011_SPI_MODE AM_HAL_IOM_SPI_MODE_0
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#define GH3011_SPI_CS 2
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#define GH3011_SPI_SCK 25
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#define GH3011_SPI_MOSI 26
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#define GH3011_SPI_MISO 27
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#define GH3011_POWER_GPIO_NUM 1
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#define GH3011_RESET_GPIO_NUM 3
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#define GH3011_INT_GPIO_NUM 4
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static void *g_spi_handle = NULL;
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void ppg_port_delay_us(uint16_t us)
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{
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am_util_delay_us(us);
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}
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void ppg_port_delay_ms(uint32_t ms)
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{
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if (xTaskGetSchedulerState() != taskSCHEDULER_RUNNING) {
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am_util_delay_ms(ms);
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} else {
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vTaskDelay(pdMS_TO_TICKS(ms));
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}
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}
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void ppg_port_bus_open(void)
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{
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int8_t ret;
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am_hal_iom_config_t iom_cfg = {
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.eInterfaceMode = AM_HAL_IOM_SPI_MODE,
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.ui32ClockFreq = GH3011_SPI_CLOCK_FREQ,
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.eSpiMode = GH3011_SPI_MODE,
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};
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am_hal_gpio_pincfg_t sck_pincfg = {
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.GP.cfg_b.uFuncSel = AM_HAL_PIN_25_M2SCK,
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};
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am_hal_gpio_pincfg_t mosi_pincfg = {
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.GP.cfg_b.uFuncSel = AM_HAL_PIN_26_M2MOSI,
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};
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am_hal_gpio_pincfg_t miso_pincfg = {
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.GP.cfg_b.uFuncSel = AM_HAL_PIN_27_M2MISO,
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};
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am_hal_gpio_pinconfig(GH3011_SPI_CS, am_hal_gpio_pincfg_output);
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am_hal_gpio_pinconfig(GH3011_SPI_SCK, sck_pincfg);
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am_hal_gpio_pinconfig(GH3011_SPI_MOSI, mosi_pincfg);
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am_hal_gpio_pinconfig(GH3011_SPI_MISO, miso_pincfg);
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ret = am_hal_iom_initialize(GH3011_SPI_MODULE_NUM, &g_spi_handle);
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if (AM_HAL_STATUS_SUCCESS != ret) {
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static_print_info("ppg_port_bus_open failed!!! SPI%d, err_num = %d\n", GH3011_SPI_MODULE_NUM, ret);
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return;
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}
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am_hal_iom_power_ctrl(g_spi_handle, AM_HAL_SYSCTRL_WAKE, false);
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am_hal_iom_configure(g_spi_handle, &iom_cfg);
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am_hal_iom_enable(g_spi_handle);
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}
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void ppg_port_bus_close(void)
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{
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int8_t ret;
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am_hal_iom_disable(g_spi_handle);
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am_hal_iom_power_ctrl(g_spi_handle, AM_HAL_SYSCTRL_DEEPSLEEP, false);
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ret = am_hal_iom_uninitialize(g_spi_handle);
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if (AM_HAL_STATUS_SUCCESS != ret) {
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static_print_info("ppg_port_bus_close failed!!! SPI%d, err_num = %d\n", GH3011_SPI_MODULE_NUM, ret);
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}
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am_hal_gpio_pinconfig(GH3011_SPI_CS, am_hal_gpio_pincfg_disabled);
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am_hal_gpio_pinconfig(GH3011_SPI_SCK, am_hal_gpio_pincfg_disabled);
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am_hal_gpio_pinconfig(GH3011_SPI_MOSI, am_hal_gpio_pincfg_disabled);
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am_hal_gpio_pinconfig(GH3011_SPI_MISO, am_hal_gpio_pincfg_disabled);
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}
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void ppg_port_bus_cs_low(void)
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{
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am_hal_gpio_output_clear(GH3011_SPI_CS);
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}
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void ppg_port_bus_cs_high(void)
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{
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am_hal_gpio_output_set(GH3011_SPI_CS);
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}
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int32_t ppg_port_bus_write(uint8_t *write_buf, uint16_t write_len)
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{
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int8_t ret;
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am_hal_iom_transfer_t transfer_cfg;
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transfer_cfg.uPeerInfo.ui32SpiChipSelect = 0;
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transfer_cfg.ui32InstrLen = 0;
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transfer_cfg.ui64Instr = 0;
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transfer_cfg.ui32NumBytes = write_len;
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transfer_cfg.eDirection = AM_HAL_IOM_TX;
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transfer_cfg.pui32TxBuffer = (uint32_t *)write_buf;
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transfer_cfg.pui32RxBuffer = NULL;
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transfer_cfg.bContinue = 0;
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transfer_cfg.ui8RepeatCount = 0;
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transfer_cfg.ui8Priority = 0;
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transfer_cfg.ui32PauseCondition = 0;
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transfer_cfg.ui32StatusSetClr = 0;
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ret = am_hal_iom_blocking_transfer(g_spi_handle, &transfer_cfg);
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if (AM_HAL_STATUS_SUCCESS != ret) {
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static_print_info("ppg_port_bus_write failed!!! SPI%d, err_num = %d\n", GH3011_SPI_MODULE_NUM, ret);
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}
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return 0;
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}
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int32_t ppg_port_bus_read(uint8_t *read_buf, uint16_t read_len)
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{
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int8_t ret;
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am_hal_iom_transfer_t transfer_cfg;
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transfer_cfg.uPeerInfo.ui32SpiChipSelect = 0;
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transfer_cfg.ui32InstrLen = 0;
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transfer_cfg.ui64Instr = 0;
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transfer_cfg.ui32NumBytes = read_len;
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transfer_cfg.eDirection = AM_HAL_IOM_RX;
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transfer_cfg.pui32TxBuffer = NULL;
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transfer_cfg.pui32RxBuffer = (uint32_t *)read_buf;
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transfer_cfg.bContinue = 0;
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transfer_cfg.ui8RepeatCount = 0;
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transfer_cfg.ui8Priority = 0;
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transfer_cfg.ui32PauseCondition = 0;
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transfer_cfg.ui32StatusSetClr = 0;
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ret = am_hal_iom_blocking_transfer(g_spi_handle, &transfer_cfg);
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if (AM_HAL_STATUS_SUCCESS != ret) {
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static_print_info("ppg_port_bus_read failed!!! SPI%d, err_num = %d\n", GH3011_SPI_MODULE_NUM, ret);
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}
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return 0;
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}
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void ppg_port_exti_enable(void *p_callback)
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{
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if (p_callback == NULL) {
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return;
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}
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uint32_t gpio_num = GH3011_INT_GPIO_NUM;
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am_hal_gpio_pincfg_t gpio_cfg = {0};
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uint32_t irq_type = GPIO_NUM2IDX(gpio_num) + 56;
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uint32_t int_mask = GPIO_NUM2MSK(gpio_num);
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memset(&gpio_cfg, 0, sizeof(am_hal_gpio_pincfg_t));
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gpio_cfg.GP.cfg_b.uFuncSel = 3;
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gpio_cfg.GP.cfg_b.eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE;
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gpio_cfg.GP.cfg_b.ePullup = AM_HAL_GPIO_PIN_PULLUP_NONE;
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gpio_cfg.GP.cfg_b.eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI;
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am_hal_gpio_pinconfig(gpio_num, gpio_cfg);
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am_hal_gpio_interrupt_register(AM_HAL_GPIO_INT_CHANNEL_0, gpio_num, (am_hal_gpio_handler_t)p_callback, NULL);
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am_hal_gpio_interrupt_irq_clear(irq_type, int_mask);
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am_hal_gpio_interrupt_control(AM_HAL_GPIO_INT_CHANNEL_0, AM_HAL_GPIO_INT_CTRL_INDV_ENABLE, &gpio_num);
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NVIC_SetPriority((IRQn_Type)irq_type, AM_IRQ_PRIORITY_DEFAULT);
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NVIC_EnableIRQ((IRQn_Type)irq_type);
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}
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void ppg_port_exti_disable(void)
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{
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uint32_t gpio_num = GH3011_INT_GPIO_NUM;
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am_hal_gpio_pincfg_t gpio_cfg = {0};
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uint32_t irq_type = GPIO_NUM2IDX(gpio_num) + 56;
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uint32_t int_mask = GPIO_NUM2MSK(gpio_num);
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memset(&gpio_cfg, 0, sizeof(am_hal_gpio_pincfg_t));
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gpio_cfg.GP.cfg_b.uFuncSel = 3;
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gpio_cfg.GP.cfg_b.eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE;
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gpio_cfg.GP.cfg_b.ePullup = AM_HAL_GPIO_PIN_PULLUP_NONE;
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gpio_cfg.GP.cfg_b.eIntDir = AM_HAL_GPIO_PIN_INTDIR_NONE;
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am_hal_gpio_interrupt_irq_clear(irq_type, int_mask);
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am_hal_gpio_pinconfig(gpio_num, gpio_cfg);
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am_hal_gpio_interrupt_control(AM_HAL_GPIO_INT_CHANNEL_0, AM_HAL_GPIO_INT_CTRL_INDV_DISABLE, &gpio_num);
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}
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void ppg_port_reset_pin_init(void)
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{
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am_hal_gpio_pinconfig(GH3011_RESET_GPIO_NUM, am_hal_gpio_pincfg_output);
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}
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void ppg_port_reset_pin_deinit(void)
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{
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am_hal_gpio_pinconfig(GH3011_RESET_GPIO_NUM, am_hal_gpio_pincfg_disabled);
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}
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void ppg_port_reset_pin_set(uint8_t val)
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{
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if (val) {
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am_hal_gpio_output_set(GH3011_RESET_GPIO_NUM);
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} else {
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am_hal_gpio_output_clear(GH3011_RESET_GPIO_NUM);
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}
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}
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void ppg_port_power_pin_init(void)
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{
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am_hal_gpio_pinconfig(GH3011_POWER_GPIO_NUM, am_hal_gpio_pincfg_output);
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}
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void ppg_port_power_pin_deinit(void)
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{
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am_hal_gpio_pinconfig(GH3011_POWER_GPIO_NUM, am_hal_gpio_pincfg_disabled);
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}
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void ppg_port_power_pin_set(uint8_t val)
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{
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if (val) {
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am_hal_gpio_output_set(GH3011_POWER_GPIO_NUM);
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} else {
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am_hal_gpio_output_clear(GH3011_POWER_GPIO_NUM);
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}
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}
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uint8_t ppg_port_power_pin_get(void)
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{
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return am_hal_gpio_output_read(GH3011_POWER_GPIO_NUM);
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}
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