146 lines
4.1 KiB
C
146 lines
4.1 KiB
C
/*
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* Copyright (c) CompanyNameMagicTag 2021-2022. All rights reserved.
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* Description: OS Abstract Layer.
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*/
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/**
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* @defgroup osal_barrier osal_barrier
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*/
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#ifndef __OSAL_BARRIER_H__
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#define __OSAL_BARRIER_H__
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#ifdef __cplusplus
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#if __cplusplus
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extern "C" {
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#endif
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#endif
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/**
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* @ingroup osal_barrier
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* @brief General basic CPU memory barriers
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*
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* @par Description:
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* The memory barrier mb() function ensures that any memory access that appears before the barrier is completed
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* before the execution of any memory access that appears after the barrier.
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*
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* @par Support System:
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* linux.
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*/
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void osal_mb(void);
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/**
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* @ingroup osal_barrier
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* @brief Read basic CPU memory barriers
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*
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* @par Description:
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* The read memory barrier rmb() function ensures that any read that appears before the barrier is completed
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* before the execution of any read that appears after the barrier.
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*
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* @par Support System:
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* linux.
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*/
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void osal_rmb(void);
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/**
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* @ingroup osal_barrier
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* @brief Write basic CPU memory barriers
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*
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* @par Description:
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* The write memory barrier wmb() function ensures that any write that appears before the barrier is completed
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* before the execution of any write that appears after the barrier.
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*
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* @par Support System:
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* linux.
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*/
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void osal_wmb(void);
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/**
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* @ingroup osal_barrier
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* @brief General basic CPU memory barriers, SMP conditional.
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*
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* @par Description:
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* Corresponding SMP versions of osal_mb.
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*
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* @par Support System:
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* linux.
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*/
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void osal_smp_mb(void);
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/**
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* @ingroup osal_barrier
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* @brief Read basic CPU memory barriers, SMP conditional.
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*
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* @par Description:
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* Corresponding SMP versions of osal_rmb.
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*
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* @par Support System:
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* linux.
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*/
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void osal_smp_rmb(void);
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/**
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* @ingroup osal_barrier
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* @brief Write basic CPU memory barriers, SMP conditional.
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*
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* @par Description:
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* Corresponding SMP versions of osal_wmb.
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*
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* @par Support System:
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* linux.
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*/
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void osal_smp_wmb(void);
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/**
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* @ingroup osal_barrier
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* @brief Instruction Synchronization Barrier.
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*
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* @par Description:
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* Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following
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* the ISB are fetched from cache or memory, after the instruction has been completed. It ensures that the effects
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* of context altering operations, such as changing the ASID, or completed TLB maintenance operations,
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* or branch predictor maintenance operations, as well as all changes to the CP15 registers,
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* executed before the ISB instruction are visible to the instructions fetched after the ISB.
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* In addition, the ISB instruction ensures that any branches that appear in program order after it
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* are always written into the branch prediction logic with the context that is visible after the ISB instruction.
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* This is required to ensure correct execution of the instruction stream.
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*
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* @par Support System:
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* linux liteos.
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*/
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void osal_isb(void);
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/**
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* @ingroup osal_barrier
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* @brief Data Synchronization Barrier.
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*
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* @par Description:
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* Data Synchronization Barrier acts as a special kind of memory barrier. No instruction in program order after
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* this instruction executes until this instruction completes. This instruction completes when:
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* · All explicit memory accesses before this instruction complete.
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* · All Cache, Branch predictor and TLB maintenance operations before this instruction complete.
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*
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* @par Support System:
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* linux liteos.
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*/
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void osal_dsb(void);
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/**
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* @ingroup osal_barrier
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* @brief Data Memory Barrier.
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*
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* @par Description:
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* Data Memory Barrier acts as a memory barrier. It ensures that all explicit memory accesses that appear in program
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* order before the DMB instruction are observed before any explicit memory accesses that appear in program order
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* after the DMB instruction. It does not affect the ordering of any other instructions executing on the processor.
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*
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* @par Support System:
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* linux liteos.
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*/
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void osal_dmb(void);
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#ifdef __cplusplus
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#if __cplusplus
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}
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#endif
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#endif
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#endif /* __OSAL_BARRIER_H__ */ |