98 lines
3.6 KiB
C
98 lines
3.6 KiB
C
/**
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* Copyright (c) @CompanyNameMagicTag 2022-2022. All rights reserved. \n
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*
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* Description: Provides flash WINBOND Configuration information. \n
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* Author: @CompanyNameTag \n
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* History: \n
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* 2022-11-15， Create file. \n
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*/
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#ifndef FLASH_WINBOND_CONFIG_H
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#define FLASH_WINBOND_CONFIG_H
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/**
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* @defgroup drivers_driver_flash_winbond_config Flash Winbond Config
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* @ingroup drivers_driver_flash
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* @{
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*/
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#include "flash_common_config.h"
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/* Winbond enter qspi mode cmd config. */
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/* W25Q32/W25Q64/W25Q128/W25Q128JW winbond flash config. */
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static flash_cmd_exe_t g_winbond_w25qxx_enter_qspi_mode_cmd[] = {
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/* Write enable for Volatils status register. */
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{ FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 1, { 0x50 } },
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/* Write status register-2 to 0x2, enable QPI write bit. */
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{ FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 2, { 0x31, 0x02 } },
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/* Waite config done. */
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{ FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR1_CMD, 0, 0 } },
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/* Enable QPI. */
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{ FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 1, { 0x38 } },
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/* Set dummy clocks 6, maxinum read freq 104MHZ. */
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{ FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_QUAD, 2, { 0xC0, 0x20} },
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/* End cmd, will not execute and need return. */
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{ FLASH_CMD_TYPE_END, HAL_SPI_FRAME_FORMAT_MAX_NUM, 0, { 0 } }
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};
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/* W25Q256 winbond flash config. */
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static flash_cmd_exe_t g_winbond_w25q256_enter_qspi_mode_cmd[] = {
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/* Write enable for Volatils status register. */
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{ FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 1, { 0x50 } },
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/* Write status register-2 to 0x2, enable QPI write bit. */
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{ FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 2, { 0x31, 0x02 } },
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/* Waite config done. */
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{ FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR1_CMD, 0, 0 } },
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/* Write enable for Volatils status register. */
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{ FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 1, { 0x50 } },
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/* ENTER 4-BYTE ADDRESS MODE. */
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{ FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 1, { 0xB7 } },
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/* Waite config done. */
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{ FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR1_CMD, 0, 0 } },
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/* Enable QPI. */
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{ FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 1, { 0x38 } },
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/* Set dummy 4, maxinum read freq 80MHZ. */
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{ FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_QUAD, 2, { 0xC0, 0x10} },
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/* End cmd, will not execute and need return. */
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{ FLASH_CMD_TYPE_END, HAL_SPI_FRAME_FORMAT_MAX_NUM, 0, { 0 } }
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};
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/* Winbond enter xip mode config. */
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/* W25Q32/W25Q64/W25Q128 winbond flash config. */
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static flash_qspi_xip_config_t g_winbond_w25qxx_config = {
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/* Enter XIP mode before config. */
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WAIT_CYCLES_4,
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HAL_SPI_INST_LEN_8,
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HAL_SPI_ADDR_LEN_32,
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HAL_SPI_TRANS_TYPE_INST_Q_ADDR_Q,
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/* Enter XIP mode after config. */
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WAIT_CYCLES_4,
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HAL_SPI_INST_LEN_0,
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HAL_SPI_ADDR_LEN_32,
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HAL_SPI_TRANS_TYPE_INST_Q_ADDR_Q,
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/* XIP 32bit addr & wrap config. */
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false,
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false,
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};
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/* W25Q256 winbond flash config. */
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static flash_qspi_xip_config_t g_winbond_w25q256_config = {
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/* Enter XIP mode before config. */
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WAIT_CYCLES_2,
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HAL_SPI_INST_LEN_0,
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HAL_SPI_ADDR_LEN_32,
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HAL_SPI_TRANS_TYPE_INST_Q_ADDR_Q,
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/* Enter XIP mode after config. */
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WAIT_CYCLES_2,
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HAL_SPI_INST_LEN_8,
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HAL_SPI_ADDR_LEN_32,
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HAL_SPI_TRANS_TYPE_INST_Q_ADDR_Q,
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/* XIP 32bit addr & wrap config. */
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true,
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false,
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};
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/**
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* @}
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*/
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#endif |