128 lines
4.7 KiB
C
128 lines
4.7 KiB
C
/*----------------------------------------------------------------------------
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* Copyright (c) Fenda Technologies Co., Ltd. 2020. All rights reserved.
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*
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* Description: drv_mx25u51245g.h
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*
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* Author: saimen
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*
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* Create: 2021-04-27
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*--------------------------------------------------------------------------*/
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#ifndef _DRV_MX25U51245G_H
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#define _DRV_MX25U51245G_H
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#include <stdint.h>
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/* Write Operations */
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#define WRITE_ENABLE_CMD 0x06
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#define WRITE_DISABLE_CMD 0x04
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/* qspi mode */
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#define ENTER_QPI_MODE_CMD 0x35
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#define EXIT_QPI_MODE_CMD 0xf5
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/* qspi reset */
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#define ENABLE_RESET 0x66
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#define RESET_DEV 0x99
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/* Register Operations */
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#define READ_STATUS_REG_CMD 0x05
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#define READ_CONF_REG_CMD 0x15
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#define READ_EXTEND_ADDR_REG_CMD 0xC8
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#define WRITE_STATUS_CONF_REG_CMD 0x01
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#define WRITE_EXTEND_ADDR_REG_CMD 0xC5
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#define WRITE_STATUS_REG_3_CMD 0x11
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/* Addr Operations */
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#define ENTER_4_BYTES_CMD 0xB7
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#define EXIT_4_BYTES_CMD 0xE9
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/* Read Operations */
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#define READ_CMD 0x13
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#define FAST_READ_CMD 0x0C
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#define QUAD_OUT_READ_CMD 0x6C
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#define QUAD_INOUT_READ_CMD 0xEE
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/* Program Operations */
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#define PAGE_PROG_CMD 0x12
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#define QPAGE_PROG_CMD 0x3E
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/* Erase Operations */
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#define SECTOR_ERASE_CMD 0x21 //4K
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#define SUBBLOCK_ERASE_CMD 0x5C //32K
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#define BLOCK_ERASE_CMD 0xDC //64K
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#define CHIP_ERASE_CMD 0x60
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#define CHIP_ERASE_CMD_2 0xC7
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#define PROG_ERASE_RESUME_CMD 0x7A
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#define PROG_ERASE_SUSPEND_CMD 0x75
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/* Identification Operations */
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#define READ_ID_CMD 0x9F
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#define QREAD_ID_CMD 0xAF
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/* Power Down Operations */
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#define ENTER_DEEP_POWER_DOWN_CMD 0xB9
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#define RELEASE_DEEP_POWER_DOWN_CMD 0xAB
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/* manufacturer ID of 1-byte and Device ID of 2-byte */
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#define FLASH_JEDEC_ID 0xC2253A
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/********************************************************/
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/// MX25U51245G页大小, 最小读写单元
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#define MX25U51245G_PAGE_SIZE 256
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/// MX25U51245G扇区大小, 最小擦除单元
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#define MX25U51245G_SECTOR_SIZE 4096
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/// MX25U51245G最小擦除单元大小
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#define MX25U51245G_ERASE_UNIT_SIZE 4096
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/// MX25U51245G块大小
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#define MX25U51245G_BLOCK_SIZE 65536
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/// MX25U51245G总大小
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#define MX25U51245G_TOTAL_SIZE (64*1024*1024)
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//FS ADD START
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/** MX25U51245G NOR FLASH 文件系统宏定义 ------------------------------------- */
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/// MX25U51245G扇区FS使用首扇区,起始编号, FLASH器件后40M为文件系统
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#define MX25U51245G_FS_BASE_SECTOR 6144
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/// MX25U51245G扇区FS使用扇区个数, 扇区编号: 6144 ~ 16383
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#define MX25U51245G_FS_SECTORS 10240
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//FS ADD END
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#define MX25U51245G_MSPI_TIMEOUT 2000000 //us
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#define MX25U51245G_MSPI_CHIP_ERASE_TIMEOUT 300000000 //us
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typedef struct
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{
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uint32_t status;
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void(*transfer_cb)(void *pcFmt, ...);
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void(*lock)(void);
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void(*unlock)(void);
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void(*delay_ms)(uint32_t ms);
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// uint32_t DMABuffer[MX25U51245G_PAGE_SIZE];
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}mx25u512_info_t;
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//read write config
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extern void drv_mx25u512_open(void);
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extern void drv_mx25u512_close(void);
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extern void drv_mx25u512_info_init(void* delay_ms,void* lock,void* unlock,void* transfer_cb);
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extern void drv_mx25u512_enter_power_down(void);
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extern void drv_mx25u512_release_power_down(void);
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extern uint32_t drv_mx25u512_read_id(void);
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extern uint32_t drv_mx25u512_read_status(void);
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extern void mx25u512_wait_ready(uint32_t delay_cs,uint32_t time_out);
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//read,write,erase flash
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extern uint32_t drv_mx25u512_chip_erase(void);
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extern uint32_t drv_mx25u512_smart_erase(uint32_t begin_addr,uint32_t end_addr);
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extern uint32_t drv_mx25u512_read_nonblocking(uint8_t *pdata,uint32_t addr,uint32_t readlen);
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//与drv_mx25u512_read_nonblocking相比，不带延迟等待
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extern uint32_t drv_mx25u512_read_nonblocking_ex(uint8_t *pdata,uint32_t addr,uint32_t readlen);
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extern uint32_t drv_mx25u512_write_nonblocking(uint8_t *pdata,uint32_t addr,uint32_t writelen);
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extern uint32_t drv_mx25u512_sector_erase(uint32_t addr);
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#endif
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